The birth of 3D Flash Memory “BiCS FLASH™”
Kioxia's predecessor, Toshiba, successfully developed NAND flash memory in 1987 and became the first in the world to mass-produce it in 1991. Through design guidelines and processes, the capacity of NAND flash memory has been continuously improved.However, increasing the capacity of NAND flash memory within the limitations of planar processes has become very challenging.To address the issue of insufficient memory storage, Kioxia employed new technology to vertically stack flash memory chips and announced 3D flash memory stacking technology in 2007. Building on this foundation, Kioxia further developed related technologies and introduced 3D flash memory: BiCS FLASH™.
BiCS FLASH™ Technologies
Beginning with the 3D NAND vertical stacking method, the number of layers has increased as technology has advanced.
KIOXIA BiCS FLASH™ generation 8 3D flash memory features 218 layers and CMOS directly Bonded to Array (CBA) wafer bonding technology, an architectural innovation that meets the needs of data-centric applications like advanced smartphones, PCs, SSDs and data centers. When performance, high density and cost-effectiveness matter, BiCS FLASH™ 3D flash memory delivers.
With the technology now relatively mature, the unit cost of each NAND has decreased while the storage capacity per unit has increased, achieving optimal cost-efficiency.
KIOXIA BiCS FLASH™ generation 8
Key Features
2D NAND refers to adding BiCS FLASH™ cells on a limited planar surface. However, as demand and technology evolve, the number of cells that can be arranged in a planar mode is quite limited. This technological advancement trend has led to the birth of 3D NAND technology.The new 3D NAND technology is based on 2D NAND but shifts from a planar to a three-dimensional structure. This significantly increases the space available for stacking BiCS FLASH™ cells, thereby greatly expanding storage capacity.
High write speed performance
By employing a 3D stacked structure, the distance between BiCS FLASH™ cells is significantly increased compared to 2D NAND. This reduces the variability of memory cells, speeds up data interpretation for each write sequence, and results in faster write speeds.
Compared to the difficulty and reliability issues of planar shrinking in 2D NAND, the vertical stacking technique in 3D NAND significantly increases the distance between BiCS FLASH™ cells. This increased distance reduces interference between cells, thereby enhancing stability.
Low Power Consumption
BiCS FLASH™ enhances the data volume of write sequences and noticeably improves processing speed. Compared to 2D NAND, it significantly reduces the energy consumption required for data processing, making it more energy-efficient.
NAND FLASH Applications
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